CE264-5-AU-CO:
Digital Systems Design
2016/17
Computer Science and Electronic Engineering (School of)
Colchester Campus
Autumn
Undergraduate: Level 5
Current
15
09 April 2010
Requisites for this module
CE161 and CE162
(none)
(none)
(none)
CE339
BENGGH46 Computers with Electronics (Including Foundation Year),
BENGGH4P Computers with Electronics,
BENGGH4Q Computers with Electronics (Including Year Abroad),
BENGI1H6 Computers with Electronics (Including Placement Year),
BENGH610 Electronic Engineering,
BENGH611 Electronic Engineering (Including Year Abroad),
BENGH61P Electronic Engineering (Including Foundation Year),
BENGHP10 Electronic Engineering (Including Placement Year),
MENGH613 Electronic Engineering,
MENGH614 Electronic Engineering (Integrated Masters, Including Placement Year),
BENGH641 Communications Engineering,
BENGHP41 Communications Engineering (Including Foundation Year),
BENGHPK1 Communications Engineering (Including Placement Year),
BENGHQ41 Communications Engineering (Including Year Abroad),
BSC GH01 Computing and Electronics,
BSC GH02 Computing and Electronics (Including Year Abroad),
BSC GH03 Computing and Electronics (Including Placement Year),
BSC H631 Electronics,
BSC H632 Electronics (Including Year Abroad),
BSC H633 Electronics (Including Placement Year)
This module aims to teach students the basics of digital system design at gate level and how complex designs can be constructed from basic components.
Learning Outcomes
After completing this module, students will be expected to be able to:
1. Understand the building blocks of complex digital systems such as registers, counters and memory
2. Describe the implementation technologies used in various types of digital systems
3. Design digital systems building blocks at gate level
4. Design systems using combinational and sequential logic as appropriate and showing an appreciation of timing issues
Outline Syllabus
. Introduction to digital systems design
. Combinational circuit design
. Sequential circuit design
. Design of control and sequencing logic
. Digital system timing
. Implementation technologies for digital systems
No information available.
No information available.
STUDENTS SHOULD NOTE THAT THIS MODULE INFORMATION IS SUBJECT TO REVIEW AND CHANGE.
Lectures, Labs and Classes
Assessment items, weightings and deadlines
| Coursework / exam |
Description |
Deadline |
Coursework weighting |
| Coursework |
Formally Graded Logbook |
|
10% |
| Coursework |
Design Report |
|
50% |
| Written Exam |
Lab competence Test |
|
20% |
| Written Exam |
Progress Test |
|
20% |
| Exam |
Main exam: 120 minutes during Summer (Main Period)
|
Exam format definitions
- Remote, open book: Your exam will take place remotely via an online learning platform. You may refer to any physical or electronic materials during the exam.
- In-person, open book: Your exam will take place on campus under invigilation. You may refer to any physical materials such as paper study notes or a textbook during the exam. Electronic devices may not be used in the exam.
- In-person, open book (restricted): The exam will take place on campus under invigilation. You may refer only to specific physical materials such as a named textbook during the exam. Permitted materials will be specified by your department. Electronic devices may not be used in the exam.
- In-person, closed book: The exam will take place on campus under invigilation. You may not refer to any physical materials or electronic devices during the exam. There may be times when a paper dictionary,
for example, may be permitted in an otherwise closed book exam. Any exceptions will be specified by your department.
Your department will provide further guidance before your exams.
Overall assessment
Reassessment
Module supervisor and teaching staff
Dr Steve Sangwine
CSEE School Office, email: csee-schooloffice (non-Essex users should add @essex.ac.uk to create full e-mail address), Telephone 01206 872770
Yes
No
No
DR Pandelis Kourtessis
University of Hertfordshire
Reader
Available via Moodle
Of 93 hours, 10 (10.8%) hours available to students:
82 hours not recorded due to service coverage or fault;
1 hours not recorded due to opt-out by lecturer(s).
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