CE264-5-AU-CO:
Digital Systems Design
2019/20
Computer Science and Electronic Engineering (School of)
Colchester Campus
Autumn
Undergraduate: Level 5
Current
Thursday 03 October 2019
Saturday 14 December 2019
15
15 May 2019
Requisites for this module
(none)
(none)
(none)
(none)
CE339
BENGGH46 Computers with Electronics (Including Foundation Year),
BENGGH4P Computers with Electronics,
BENGGH4Q Computers with Electronics (Including Year Abroad),
BENGI1H6 Computers with Electronics (Including Placement Year),
BENGH610 Electronic Engineering,
BENGH611 Electronic Engineering (Including Year Abroad),
BENGH61P Electronic Engineering (Including Foundation Year),
BENGHP10 Electronic Engineering (Including Placement Year),
MENGH613 Electronic Engineering,
MENGH614 Electronic Engineering (Integrated Masters, Including Placement Year),
BENGH641 Communications Engineering,
BENGHP41 Communications Engineering (Including Foundation Year),
BENGHPK1 Communications Engineering (Including Placement Year),
BENGHQ41 Communications Engineering (Including Year Abroad),
BSC H631 Electronics,
BSC H632 Electronics (Including Year Abroad),
BSC H633 Electronics (Including Placement Year),
BENGH730 Mechatronic Systems,
BENGH731 Mechatronic Systems (Including Year Abroad),
BENGH732 Mechatronic Systems (Including Placement Year)
This module will teach students the basics of digital system design at gate level and how complex designs can be constructed from basic components using combinational and sequential logic as appropriate. Students will use various types of digital systems using gate level building blocks.
This module aims to teach students the basics of digital system design at gate level and how complex designs can be constructed from basic components.
After completing this module, students will be expected to be able to:
1. Understand the building blocks of complex digital systems such as registers, counters and memory
2. Describe the implementation technologies used in various types of digital systems
3. Design digital systems building blocks at gate level
4. Design systems using combinational and sequential logic as appropriate and showing an appreciation of timing issues
Outline Syllabus
. Introduction to digital systems design
. Combinational circuit design
. Sequential circuit design
. Design of control and sequencing logic
. Digital system timing
. Implementation technologies for digital systems
Lectures, Labs and Classes
- Floyd, Thomas L. (2013) Digital Fundamentals, Boston: Pearson.
The above list is indicative of the essential reading for the course. The library makes provision for all reading list items, with digital provision where possible, and these resources are shared between students. Further reading can be obtained from this module's reading list.
Assessment items, weightings and deadlines
| Coursework / exam |
Description |
Deadline |
Coursework weighting |
| Coursework |
Lab competence Test - Wk 4 |
|
20% |
| Coursework |
Progress Test - Wk 8 |
|
20% |
| Coursework |
Formally Graded Logbook |
|
10% |
| Coursework |
Design Report |
|
50% |
| Exam |
Main exam: 180 minutes during Summer (Main Period)
|
Exam format definitions
- Remote, open book: Your exam will take place remotely via an online learning platform. You may refer to any physical or electronic materials during the exam.
- In-person, open book: Your exam will take place on campus under invigilation. You may refer to any physical materials such as paper study notes or a textbook during the exam. Electronic devices may not be used in the exam.
- In-person, open book (restricted): The exam will take place on campus under invigilation. You may refer only to specific physical materials such as a named textbook during the exam. Permitted materials will be specified by your department. Electronic devices may not be used in the exam.
- In-person, closed book: The exam will take place on campus under invigilation. You may not refer to any physical materials or electronic devices during the exam. There may be times when a paper dictionary,
for example, may be permitted in an otherwise closed book exam. Any exceptions will be specified by your department.
Your department will provide further guidance before your exams.
Overall assessment
Reassessment
Module supervisor and teaching staff
Dr Stephen Sangwine, email: sjs@essex.ac.uk.
Dr Steve Sangwine
CSEE School Office, email: csee-schooloffice (non-Essex users should add @essex.ac.uk to create full e-mail address), Telephone 01206 872770
Yes
No
No
Dr Robert John Watson
University of Bath
Senior Lecturer
Available via Moodle
Of 137 hours, 15 (10.9%) hours available to students:
122 hours not recorded due to service coverage or fault;
0 hours not recorded due to opt-out by lecturer(s).
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